دورات هندسية

 

 

دورة سيسكو(ccna)

صفحة 5 من 11 الأولىالأولى 1 2 3 4 56 7 8 9 ... الأخيرةالأخيرة
النتائج 41 إلى 50 من 109
  1. [41]
    ياسين2999
    ياسين2999 غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Apr 2006
    المشاركات: 344
    Thumbs Up
    Received: 0
    Given: 0

    Question

    السلام عليكم ,
    أخت هيفا أيمكنك تزويدنا بتطبيقات عملية لهذه الدورة (إذا كان بالإمكان) ,
    لك كثير الشكر و السلام .

    0 Not allowed!



  2. [42]
    alpha_beta
    alpha_beta غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Jan 2006
    المشاركات: 378
    Thumbs Up
    Received: 0
    Given: 0
    هذه الدورة خاصة بالشبكات التي يتم الإعداد عن طريق مدرب معتمد من سيسكو

    0 Not allowed!



  3. [43]
    ياسين2999
    ياسين2999 غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Apr 2006
    المشاركات: 344
    Thumbs Up
    Received: 0
    Given: 0

    Talking

    لكن و للأسف لا توجد مثل هذه الورات (فقط للمؤسسات عن طريق الطلب) لذا أريد الذهاب إلى أبعد من الدروس النضرية إلى العملى أو التطبيقى ,
    أرجو أن تكون الصورة قد إتضحت ؟

    0 Not allowed!



  4. [44]
    alpha_beta
    alpha_beta غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Jan 2006
    المشاركات: 378
    Thumbs Up
    Received: 0
    Given: 0
    في جامعتا هناك قاعة خاصة بالشبكات و التي يتم إدارتها عن طريق مدرب من سيسكو ، و هي بطريقة التعليم على الواقع hands on و بالممارسة و تعطى شهادة ، صدقني أحسست بالتعقيد عندما دخلت تلك الدورة و لكن بعد الممارسة سيتحسن كل شيء

    0 Not allowed!



  5. [45]
    ياسين2999
    ياسين2999 غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Apr 2006
    المشاركات: 344
    Thumbs Up
    Received: 0
    Given: 0

    Talking

    إذا أيمكنك تزويدنا ببعض ما عندك ؟

    0 Not allowed!



  6. [46]
    alpha_beta
    alpha_beta غير متواجد حالياً
    عضو فعال جداً


    تاريخ التسجيل: Jan 2006
    المشاركات: 378
    Thumbs Up
    Received: 0
    Given: 0
    إن شاء الله

    0 Not allowed!



  7. [47]
    هيفا
    هيفا غير متواجد حالياً
    عضو فعال


    تاريخ التسجيل: May 2006
    المشاركات: 119
    Thumbs Up
    Received: 0
    Given: 0
    السلام عليكم هذه تكملة الفصل الثاني
    The RSP7000 is installed in slot 5 of the 7000 series and slot 4 of the 7010 series. The 7000CI is installed in slot 6 of the 7000 series and slot3 of the 7010 series. Figure 2.20 diagrams the installation of the RSP7000 and 7000CI on both the 7000 and 7010 series routers.
        1. Memory
    While both the RP and RSP7000 use the Intel Series 2+ Flash Memory cards, they must be reformatted if used between the two processors. The RP supports one slot for flash memory and the RSP7000 supports two flash memory slots. The RP flash memory PCMCIA card is either 8MB or 16MB. The RSP7000 is available in either 8-, 16- or 20MB formats with a total of 40MB of flash memory.
    The RP processor comes standard with 16MB of RAM and is upgradeable to 64MB. The RSP7000 comes standard with 32MB of RAM with expansion to a total of 128MB. Appendix D highlights the various DRAM requirements along with the feature sets available for the 7000 series routers.
      1. Cisco 7x00 Series Interface Processors The strength of the Cisco router product line is the ability to support the many different LAN/WAN physical interface standards available. The Cisco 7x00 family of routers has a very versatile offering supporting these standards without restricting the combinations possible by mixing and matching the interface processor boards on the chassis. The Cisco 7x00 router platform can actively support any combination of Ethernet, Fast Ethernet, Gigabit Ethernet, Token Ring, FDDI, serial, channelized T3, Multichannel E1/T1, IBM mainframe channel attachment, ATM, Packet OC-3, ISDN, and HSSI interfaces. These interfaces are provided on interface processors that connect physical networks to the high-speed bus of the Cisco 7x00 router. The interface processors are specific to the 7000 and 7500 router platforms. The 7200 router platform uses port adapters which are akin to the port adapters of the Versatile Interface Processor (VIP) available on the 7000 and 7500 router platforms. The VIP and the port adapters supported are discussed in the following section.
        The interface processors are modular circuit boards measuring 11 x 14 inches with network interface connectors. The interface processors all support OIR and are loaded with mircocode images bundled with the Cisco IOS software. The exception to this bundling of microcode is the CIP which is unbundled as of IOS version 11.1(7) and higher. For the most part, each interface processor is self contained on a single motherboard. However, some interface processors require a companion board attached to the motherboard. For example, the AIP board uses a physical layer interface module (PLIM) which is installed at the factory based on the AIP order.
        1. ATM Interface Processor (AIP)
    The AIP board supports fiber optic connectivity and coaxial connectivity in support of Asynchronous Transfer Mode (ATM) networking environments. The board also supports single mode and multimode fiber-optic connections. Figure 2.21 illustrates the AIP board with a fiber-optic PLIM. The following lists the media types supported by the AIP board:
      • Transparent Asynchronous Transmitter/Receiver Interface (TAXI) multimode fiber-optic
      • Synchronous Optical Network (SONET) multimode fiber-optic
      • SONET single-mode fiber-optic
      • E3 coaxial
      • DS3 coaxial
    The AIP board can now support up to OC-12 SONET connectivity for high bandwidth and throughput requirements. Each of the media type supported requires a specific cable connection. Appendix E lists all the cable specifications for all the router platforms and their interfaces.
        1. Channel Interface Processor 2 (CIP2)
    The Cisco Channel Interface Processor 2 (CIP2) is the second generation of IBM mainframe channel connectivity boards offered in support of connecting router networks directly to the mainframe. The CIP2 is a direct competitor to IBM’s 3172 Interconnect Controller and the IBM 2216 channel attached router. The CIP2 has memory and processing advantages over the first generation CIP. The CIP2 supports both IBM’s parallel bus-and-tag channel and ESCON fiber channel architectures. The CIP2 ships with a default of 32 MB of memory with memory configuration of 64- and 128-MB allocations.
    The CIP2 is compatible with the Cisco 7000 series router using Cisco IOS release 10.2(13) or later, 10.3(12) or later, 11.0(10) or later and all versions at 11.1(5) or later. The 7500 series router requires the Cisco IOS release level be at 10.3(13) or later, 11.0(10) or later, and all versions at 11.1(5) or later.

    0 Not allowed!





    YOU CAN'T FLY WITHOUT IMAGINATION


    drawGradient()


  8. [48]
    هيفا
    هيفا غير متواجد حالياً
    عضو فعال


    تاريخ التسجيل: May 2006
    المشاركات: 119
    Thumbs Up
    Received: 0
    Given: 0
    The CIP2 microcode is unbundled from the IOS software as of release 11.1(7) and must be ordered separately from the IOS when installing a CIP2. The microcode supports the following mainframe connectivity features:
      • TCP/IP Datagram
      • TCP/IP Offload
      • CIP Systems Network Architecture (CSNA) connectivity using External Communications Adapter (XCA) communications to VTAM
      • TN3270 Server
      • Native Client Interchange Architecture (NCIA) Server
      • Advanced Peer to Peer Network (APPN)
    The CIP2 supports different combinations of channel connectivity to the mainframe. These combinations are configured at the factory and must be ordered appropriately. Figure 2.22 diagrams a CIP2 board with a single parallel channel and single ESCON interface configuration. The valid combinations for the CIP2 interfaces are:
      • Single parallel channel
      • Dual parallel channel
      • Single ESCON channel
      • Dual ESCON channel
      • Single ESCON channel and single parallel channel
    When ordering a CIP2 board it is advisable to determine the number of TCP/IP and SNA connections planned for use by the CIP2. The number of connections directly related to CIP2 performance and memory requirements. While Cisco has memory recommendations and formulas to calculate memory requirements it is advisable to order the CIP2 with the maximum amount of memory, 128 MB, to allow for growth and performance without compromising availability and reliability. Appendix E details the CIP2 memory formulas and minimum requirements.
        1. Channelized T3 Interface Processor (CT3IP) The CT3IP is based on the VIP2 interface processor architecture. It is a fixed-configuration, meaning that it is not reconfigurable after ordering or installation. The CT3IP supports four T1 connections and a single DS-3 connection as shown in Figure 2.23. The T1 connections use a DB-15 connector and the DS-3 uses a transmit (TX) and receive (RX) female BNC connection pair. The DS-3 connection provides up to 28 T1 channels with each channel viewed as a serial interface to the system. Each channel may then be configured individually. The CT3IP board is supported on the Cisco 7500 series and Cisco 7000 series with the RSP7000 and 7000CI boards only.
        2. Ethernet Interface Processor (EIP) The EIP supports 10 Mbps Ethernet LAN connectivity. There are three variations of the EIP board supporting either two, four or six 10 Mbps Ethernet 802.3 interface ports. Figure 2.24 diagrams a six port EIP board. Attachment of the EIP interfaces may require a transceiver that converts to 802.3 and attachment user interface (AUI) cable to RJ-45 cable connectivity to a LAN hub or switch.
        3. Fast Ethernet Interface Processor (FEIP) and FEIP2 The interface processor forms support fast Ethernet connectivity at 100 Mbps. The media supported is twisted-pair or fiber-optic cable. The format of the board uses the port adapter architecture found with VIP2 boards, but, the FEIP and FEIP2 port adapters are not interchangeable for use on the VIP2 board or Cisco 7200 series routers. Figure 2.25 illustrates the FEIP and FEIP2 boards. Note that the main difference on the boards is the inclusion f a CPU on the FEIP2. The CPU on the FEIP2 offloads the RSP of switching, filtering and other previously RSP based functions thereby increasing performance on the FEIP2 and the RSP in general.
          Both the FEIP and FEIP2 have configurations that support one or two port adapters. Each port adapter supports a RJ-45 and MII connector. The MII connector in concert with a transceiver supports fiber-optic connectivity. Only one of the interfaces may be active on each port adapter. The RJ-45 supports Category 5 UTP 100BaseTX connectivity. The FEIP supports full- and half-duplex operations on all interfaces in any combination. The FEIP2 only allows half-duplex operations on the 100BaseTX RJ-45 connection. The FEIP2 may operate both 100BaseFX interfaces using either half-duple or full-duplex modes. However, in a configuration where both MII interfaces attach 100BaseFX LANs, only one interface may operate in full-duplex mode. In addition to the use of a CPU on the motherboard, the FEIP2 includes 1 MB of SRAM and 8 MB of DRAM.
          The Cisco 7000 series supports the FEIP using 100BaseTX with Cisco IOS release 10.3(5) or later. The Cisco 7500 series supports FEIP 100BaseTX using Cisco IOS software release 10.3(6) or later. Support for 100BaseFX connectivity on the Cisco 7000 and 7500 series using Cisco IOS Release 10.3(13) or later, 11.0(10) or later and Release 11.1(5) or later.
          The FEIP2 board and interface support for 100BaseTX and 100BaseFX connections is found in Cisco IOS Release 11.1(10)CA or later for both the Cisco 7000 and 7500 series routers.
        4. FDDI Interface Processor (FIP)
    The FIP enables the Cisco 7000 and 7500 router platform to support single mode and multimode FDDI connections at 100 Mbps. Figure 2.26 diagrams the four FIP board configurations. These configurations support:
      • Multimode to multimode with optical bypass
      • Multimode to single-mode
      • Single-mode to multimode
      • Single-mode to single-mode with optical bypass

    0 Not allowed!





    YOU CAN'T FLY WITHOUT IMAGINATION


    drawGradient()


  9. [49]
    هيفا
    هيفا غير متواجد حالياً
    عضو فعال


    تاريخ التسجيل: May 2006
    المشاركات: 119
    Thumbs Up
    Received: 0
    Given: 0
        1. Fast Serial Interface Processor (FSIP) The FSIP, as shown in Figure 2.27, uses dual-port port adapters. Each port adapter supports two serial interfaces. Each interface can support up to 6.132 Mbps. The 6.132 Mbps bandwidth is the total allowed for the entire FSIP board. If one or more ports totals a bandwidth of 6.132 Mbps, the remaining ports are not available for use.
          The FSIP supports two configurations. A four interface serial port adapter and an eight interface serial port adapter. The first ports are numbered 0 – 3 and the second are numbered 4 – 7.
        2. High Speed Serial Interface(HSSI) Interface Processor (HIP) The HIP is capable of supporting up to 52 Mbps bandwidth. The HIP, diagrammed in Figure 2.28, enables data rates up to 45 Mbps (DS-3) or 34 Mbps (E3) for connecting ATM, SMDS, Frame Relay or private lines. The HIP uses a special cable and must be ordered from Cisco for supporting this high speed configuration.
        3. Multichannel Interface Processor (MIP)
    The MIP, shown in Figure 2.29, is a multichannel multiplexer allowing the router to emulate an Nx64 or Nx56 backbone multiplexer on a 1.536 Mbps (T1) or 2.048 Mbps (E1) line. The MIP supports seven different types of configurations:
      • One E1/PRI port at 75-ohm unbalanced
      • Two E1/PRI ports at 75-ohm unbalanced
      • One E1/PRI port at 120-ohm balanced
      • Two E1/PRI ports at 120-ohm balanced
      • One channelized E1 75-ohm unbalanced or 120-ohm balanced
      • One T1/PRI port
      • Two T1/PRI ports
    These configuration allow the MIP to provide varied answers to connectivity requirements. The dual port MIP can act as a dial-on-demand ISDN PRI for high volume locations or be configured through software enabling one port to act as an ISDN PRI line while the other operates as a multichannel multiplexer feeding remote locations.
        1. Packet OC-3 Interface Processor (POSIP)
    The POSIP board, shown in Figure 2.30, complies with RFC 1619, "PPP over SONET/SDH" and RFC 1662, "PPP in HDLC-like Framing". Using these standards, the POSIP encapsulates packet data using Point-to-Point Protocol (PPP) which is then mapped into an STS-3c/STM-1 frame reducing the transport overhead by approximately fifty percent as compared to using ATM adaptation Layer 5 (AAL5) and line card control (LCC) Subnetwork Access Protocol (SNAP) encapsulations over SONET OC-3 media.
    The POSIP interface supports one 155 Mbps port using either single-mode or multimode optical-fiber on Cisco 7000 and 7500 series routers. The Cisco 7000 must have the RSP7000 system processor installed to support the POSIP board. The POSIP has support for the following features:
      • SONET/SDH compliant interface; SONET/STS-3c and SDH/STM-1 framing and signaling overhead
      • Full-duplex operation at OC-3 155 Mbps
      • Intermediate reach optical interface with single-mode fiber
      • Optical interface with multimode fiber
      • OIR
    The POSIP board connects the OC-3 optical-fiber network to the CxBus on the 7000 series or the CyBus on the 7500 series routers. The POSIP installs on any available interface processor slot. The POSIP board may be configured with 16 or 32 MB of DRAM and 1 or 2 MB of SRAM. The memory requirements may be upgraded at a later date.
        1. Service Provider MIP (SMIP)
    Internet Service Providers require speed in delivering packets between the end user community and the Internet. The SMIP functions similarly to the MIP. However, the SMIP does not support multiprotocol routing. Using Cisco IOS Release 10.2(6) or later is requried to support the following SMIP functions:
      • IP routing with PPP or High-Level Data Link Control (HDLC)
      • ISDN PRI connectivity
    The SMIP, shown in Figure 2.31, supports three different types of configurations. These are:
      • Two T1 ports
      • Two E1 ports with 75-ohm
      • Two E1 ports with 120-ohm
    Note that the SMIP is only optioned with two ports. One port may be used to channelize Nx64 or Nx56 supporting 24 channels on a T1 or 30 channels on an E1. Each channel is configured as its own serial interface. The second port may be used as an ISDN PRI port for ISDN BRI dial connections to the router.
        1. Standard Serial Interface Processor (SSIP) The SSIP is only optioned with eight high-speed serial ports. The total aggregate bandwidth supported by the SSIP is 8 Mbps. The dual-port port adapters used on the SSIP are compatible with the FSIP. They are not interchangeable with the VIP2 or 7200 series port adapters. Each port diagrammed in Figure 2.32, when using Cisco IOS Release 10.3(6) or later, supports up to T1 or E1 speeds when using IP routing encapsulated in PPP or HDLC. If multiprotocol routing is required the serial port uses PPP or HDLC encapsulation with speeds at 64 Kbps or less.
        2. Token-Ring Interface Processor (TRIP) The TRIP connects the Cisco CxBus or CyBus to a token ring network at 4 or 16 Mbps. Each port is connected to a token ring multistation access unit (MAU) suing a DB-9 connector. The TRIP is configurable with either two or four token ring ports. Figure 2.33 illustrates the TRIP board.
        3. Versatile Interface Processor 2 (VIP2)
    The VIP2, shown in Figure 2.34, is a new generation interface processor board with a high speed RISC MIPS 4700 processor with an internal speed of 100 MHz and a system bus interface speed of 50 MHz. This CPU enables the VIP2 to process all functions on the VIP2 rather than requesting functions from the RSP system processor. This function is available with Cisco IOS Release 11.1(472) or later, enabling the VIP2 to run the Cisco IOS kernel directly on its own CPU. The 7000 and 7010 series routers must have the RSP7000 and 7000CI system boards installed in order to use the VIP2 features.
    The VIP2 is comprised of a motherboard and up to two port adapters or service adapters. Any combination of port or service adapters may be installed on the VIP2 in support of LAN and WAN interfaces and services. Appendix E details the VIP2 models of VIP2 required in support of various port adapter and service adapter configurations.
      1. Cisco 7x00 Series Port and Service Adapters
    The port and service adapters for the 7x00 series routers are compatible between the VIP2 and the 7200 series router. The 7000 and 7010 series routers must have the RSP7000 and 7000CI system boards installed prior to using the VIP2 board supporting the port adapter and service adapters. The following media and interface types are supported on the entire 7x00 series product line:
      • ATM
      • 100VG-AnyLAN
      • Ethernet 10BaseT
      • 10BaseFL
      • Fast Ethernet 100BaseTX
      • 100BaseFX
      • Token Ring
      • Fiber Distributed Data Interface (FDDI)
      • High-Speed Serial Interface (HSSI)
      • Synchronous serial media
      • Channelized T1/ISDN PRI

    0 Not allowed!





    YOU CAN'T FLY WITHOUT IMAGINATION


    drawGradient()


  10. [50]
    هيفا
    هيفا غير متواجد حالياً
    عضو فعال


    تاريخ التسجيل: May 2006
    المشاركات: 119
    Thumbs Up
    Received: 0
    Given: 0
    The Cisco 7200 series supports all of the above media and interface types along with support for ATM-Circuit Emulation Services (ATM-CES) and ISDN PRI and BRI connections.
        1. ATM OC-3 The ATM OC-3 comes in two models as shown in Figure 2.35. The port adapter uses a single-port SC duplex connector to the OC-3c ATM network. It is supported on the full 7x00 series line when used with Cisco IOS Release 11.1(9)CA. The fiber run from the router to the switch may be up to 15 km in length.
        2. ATM-Circuit Emulation Services (ATM-CES) The ATM-CES is supported only on the 7200 series routers. It supports four T1 CES interfaces and a single ATM trunk for servicing data, voice and video traffic over an ATM WAN using Cisco IOS Release 11.1(11)CA or later. As shown in Figure 2.36, the ATM-CES can support either structured Nx64 Kbps or unstructured 1.544 Mbps circuits. The ATM-CES is optioned with either an OC-3 (155 Mbps) single-mode intermediate reach ATM trunk interface or a DS-3 (45 Mbps) ATM trunk interface.
        3. 100VG-AnyLAN The 100VG-AnyLAN standard was developed and published by Hewlett-Packard (HP). Its intention is to provide voice, video and data transport over 100 Mbps using Ethernet. The 100VG-AnyLAN port adapter uses a single interface port supporting the IEEE 802.12 specification of running 802.3 Ethernet packets at 100 Mbps over Category 3 or Category 5 UTP cable with RJ-45 terminations. The 100VG-AnyLAN port adapter operates at 120 Mbps using the 5B/6B coding scheme to provide the 100 Mbps data rate at half-duplex. Figure 2.37 depicts the 100VG-AnyLAN port adapter.
        4. ISDN Basic Rate Interface (BRI) The ISDN BRI port adapter is available only on the 7200 series router. Using an NT1 device, the 7200 ISDNBRI port adapter connects using either one or both of the two B channels (64 Kbps) in full-duplex mode observing an aggregate rate of 128 Kbps. The single D channel on the BRI is also available at a full-duplex data rate of 16 Kbps. Figure 2.38 illustrates the two models available for the 7200 series router. The port adapters are available in either 4 or 8 ISDN BRI ports. The 4 port ISDN BRI port adapter connect switch a U interface while the 8 ISDN BRI port adapter uses an S/T interface to the NT1 device.
        5. Channelized T1/E1 ISDN PRI The channelized port adapters from Cisco support T1 (1.544 Mbps) and E1 (2.048 Mbps) line speeds with the ability to connect using ISDN PRI standards. Each port adapter is available with one or two interfaces. The channelized E1/ISDN PRI port adapter is available with unbalanced 75-ohm or balanced 120-ohm connections. Figure 2.39 illustrates the channelized T1/E1 ISDN PRI port adapter.
        6. Ethernet 10BaseT The IEEE 802.3 Ethernet 10BaseT standard is supported using wither four or eight interfaces. Each interface runs at wire speed of 10 Mbps thereby providing an aggregate bandwidth of 40 Mbps for the four port and 80 Mbps for the eight port. The Ethernet 10BaseT port adapter, depicted in Figure 2.40, is available on the entire Cisco 7x00 router platform.
        7. Ethernet 10BaseFL Support for 10 Mbps Ethernet over fiber-optic media is provided by using the 10BaseFL port adapter. The port adapter has up to five interfaces using the IEEE 802.3 Ethernet 10BaseFL standard running at 10 Mbps each in half-duplex mode with an aggregate bandwidth rate of 50 Mbps. The interfaces, as shown in Figure 2.41, uses a pair of multimode S/T receptacles one for receive (RX) and one for transmit (TX) both at wire speed. The Ethernet 10BaseFL is supported across the Cisco 7x00 router platform.
        8. Fast Ethernet The Cisco Fast Ethernet port adapters support full- and half-duplex operation at 100 Mbps. This port adapter is available on all the Cisco 7x00 router platforms and comes in two models.
          In support of twisted pair media, the Fast Ethernet port adapter provides a single 100BaseTX port for connection to Category 5 UTP media using an RJ-45 connection. The 100BaseTX port adapter, shown in Figure 2.42, may also connect to Category 3, 4, and 5 UTP or STP for 100BaseT4 media using the MII interface. Additionally the 100BaseTX Fast Ethernet model may connect to multimode fiber for 100BaseFX media using the MII interface through external transceivers.
          Connectivity to fiber-optic media is also available using the 100BaseFX Fast Ethernet port adapter. The 100BaseFX port adapter, shown in Figure 2.43, connects to fiber-optic media in one of two ways. The 100BaseFX may use SC fiber-optic connectors or use external transceivers to multimode fiber through the MII interface. Additionally, the 100BaseFX Fast Ethernet port adapter allows connectivity to 100BaseT4 networks through the MII interface over Category 3, 4, and 5 UTP or STP media.
        9. Synchronous Serial
    The synchronous serial port adapter comes with four interfaces. Each interface must be alike and supports the following electric standards:
      • EIA/TIA-232
      • EIA/TIA-449
      • EIA-530 X.21
      • V.35

    0 Not allowed!





    YOU CAN'T FLY WITHOUT IMAGINATION


    drawGradient()


  
صفحة 5 من 11 الأولىالأولى 1 2 3 4 56 7 8 9 ... الأخيرةالأخيرة
الكلمات الدلالية لهذا الموضوع

عرض سحابة الكلمة الدلالية

RSS RSS 2.0 XML MAP HTML